Heterogenous computing: from advanced SoC to MCU
Heterogenous computing represents a major trend in the semiconductor market, enabling AI and machine learning to be massively deployed in a myriad of applications across each industry domain. Such approach is evident not just in the segment of high-performance computing, but it is also a major trend affecting several embedded applications that can take advantage of basic machine learning algorithms even when implemented by a “simpler” microcontroller unit (MCU).
In IHS Markit's opinion, there will be a plethora of applications and use cases that will take advantage of machine learning. This trend is and will be fostering the development of new tailored silicon solutions. IHS Markit tends to cluster the silicon solutions in four major buckets that will be available in the coming future. Each one of these will address different markets and applications and will also have relative pros and cons.
Figure 1: Clustering of silicon solutions for various AI applications:
When looking at the market of advanced SoCs, we can already see that the traditional highperformance GPU, CPU, or FPGA are already showing a clear migration toward heterogenous platforms.
As shown in Figure 2 below, it is getting more and more difficult for each of the above-mentioned components to match their original naming with their new architecture and the proliferation of different cores and accelerators. IHS Markit expects this trend to be even more evident in the coming future.
Figure 2: Trend toward heterogenous SoC architecture
As mentioned before, and publicly announced by most of the key microcontroller suppliers, even MCUs will be impacted by AI. STM, Renesas, and NXP announced a series of new MCU families, aiming to support the big request of optimized edge devices in the IoT world. These components will have machine learning capability, optimized to high efficiency, low power and low costs, even if they come with limited performance in terms of operation per second (OPS).
ASIC components optimization expected to spread at the edge (network edge and device end-points edge)
In the rising market of AI, the market of ASICs is flourishing, driven by several start-ups. It is aiming to offer completely new architectures in processing capability and memory interface that will challenge the traditional architecture (CPU, GPU, FPGA, DSP) in terms of optimized performance. The business model for each company might be quite different, for example, from targeting the market of discrete co-processor to offering instead highly integrated IP-core, or even both. The size of the addressable market with the uncertainty and dynamics of the industry are giving enough space and funding to research and develop at high speed. Nonetheless, consolidation will occur also for the IC market addressing AI, as always happens when disruptive technologies face and enable new markets. This means that in the next 10 years most likely just a few will survive.
IHS Markit simplifies advantages and challenges of the ASIC market as follows:
- Optimized performance vs power consumption (energy efficiency)
- New architectures take memory into account (i.e., consumption)
- Development time
- Impact on scaling and tech-node
- SW and HW platform scalability
- High volume need
In the market of ASIC, both the approaches—discrete components SoC + ML accelerator and highly integrated SoC with accelerators in a single die—present advantages and challenges. Considerations include dependency of the targeted application as well as of several other parameters that span from performance to optimization in power consumption passing through workload variance, technology node, market volumes and, finally, costs. The major variances above will impose different constraints and challenges in the business model when targeting the automotive market rather than edge or cloud computing.